The low frequency generated in the power system reduces the overall efficiency of the system to a greater extent and also causes various other problems. This project is developed to reduce the harmonics to a greater extent. This involves the implementation of two-level cascaded inverter with the elimination of 3rd and 5th harmonics using micro-controller (P89V51RD2), Multi-level inverters operate with low frequency and highly efficient than PWM inverters because of low switching losses. H-Bridge inverter provides a significant advantage over other multi-level inverter topologies. It consists of less number of components with an optimized circuit layout. The circuit has been simulated in MULTISIM software. MOSFET (IRF630FP) is used as power switching device. Fourier analysis has been made to eliminate the 3rd and 5th harmonics. Opto-coupler (4 pin DIP 817B) provides the necessary gate driving voltage and is used to overcome the common ground problem. The switching sequences are carefully calculated, used effectively. All the MOSFETs are utilized equally and dc sources provide proper input voltage.